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Asic Verification Engineer, Wrocław

Ostatnia aktualizacja 2024-05-21
Wygasa 2024-06-21
ID #2131289978
Free
Asic Verification Engineer, Wrocław
Poland, Dolnośląskie, Wrocław,
Zmodyfikowano April 25, 2024

Opis

Technologies-expected : ASIC responsibilities : Collaborate with a team of ASIC verifiers to execute IP design/verification and Sub Sys integration/verification projects.

Utilize your expertise in ASIC verification to ensure the successful completion of complex projects.

Work with various levels of experience within the team, providing mentorship and support to junior members.

Contribute to test bench structuring and design, leveraging your leadership qualities to drive project success.

Demonstrate proficiency in RTL design, scripting, and telecommunication protocols.

requirements-expected :3 years or more of experience in ASIC verification.

Proficiency in UVM for at least one year is preferred.

Experience working with complex ASIC and/or large FPGA designs.

Familiarity with IP block verification and multi-clock domains.

Strong proficiency in Verilog, VHDL, and/or System Verilog.

Excellent English communication skills, both verbal and written.

Leadership qualities and the ability to mentor junior team members.

Scripting skills for test automation.

offered : Competitive compensation package.

Remote work opportunities within European time zones.

Occasional travel to Sweden, with expenses covered by the client.

Collaborative and dynamic work environment.

Opportunities for professional growth and development.

Szczegóły pracy:

Rodzaj pracy: Pełny etat
Rodzaj kontraktu: Stały
Rodzaj wynagrodzenia: Miesięczny
Zawód: Asic verification engineer
Zdalny:

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